Digital Circuits Questions and Answers – Fast Adder & Serial Adder – 1

Digital Circuits Questions and Answers – Fast Adder & Serial Adder – 1

This set of Digital Electronics/Circuits Multiple Choice Questions & Answers (MCQs) focuses on “Fast Adder & Serial Adder – 1”.

1. The inverter can be produced with how many NAND gates?
a) 2
b) 1
c) 3
d) 4

Answer: b
Explanation: The inverter can be produced with the help of single NAND gate, because we can send a single input twice through the same NAND gate together, thus producing the inverted version of the input as output. It works as an inverter.

2. One positive pulse with tw = 75 µs is applied to one of the inputs of an exclusive-OR circuit. A second positive pulse with tw = 15 µs is applied to the other input beginning 20 µs after the leading edge of the first pulse. Which statement describes the output’s relation with the inputs?
a) The exclusive-OR output is a 20 s pulse followed by a 40 s pulse, with a separation of 15 s between the pulses
b) The exclusive-OR output is a 20 s pulse followed by a 15 s pulse, with a separation of 40 s between the pulses
c) The exclusive-OR output is a 15 s pulse followed by a 40 s pulse
d) The exclusive-OR output is a 20 s pulse followed by a 15 s pulse, followed by a 40 s pulse

Answer: d
Explanation: When both the input pulses are high or low X-OR output is low. But when one of the input is high and another is low or vice-versa, output is high. In this problem for the first 20uS one input is high and another is low. So, obviously output is a high. for next 15uS both the input is high so output is low and for remaining 40uS(75-20-15) first input is still high and second one is low so output is high.

3. How many NOT gates are required to implement the Boolean expression: X = AB’C + A’BC?
a) 2
b) 3
c) 4
d) 5

Answer: a
Explanation: Since in the given expression two inputs are complemented. So, we require two NOT gate at the input. A NOT gate is a basic gate which accepts a single input and produces a single output, which is the inverted version of the input.

4. The carry look ahead adder is based on the principle of looking at the lower order bits of ________ and ________ if a high order carry is generated.
a) Addend, minuend
b) Minuend, subtrahend
c) Addend, minuend
d) Augend, addend

Answer: d
Explanation: The carry look ahead adder is based on the principle of looking at the lower order bits of the augend and addend if a high order carry is generated. A carry look ahead adder is a type of adder which reduces the propagation delay.

5. What are carry generate combinations?
a) If all the input are same then a carry is generated
b) If all of the output are independent of the inputs
c) If all of the input are dependent on the output
d) If all of the output are dependent on the input

Answer: b
Explanation: If the input is either 0, 0, 0 or 0, 0, 1 then the output will be 0 (i.e. independent of input) and if the input is either 1, 1, 0 or 1, 1, 1 then the output is 1 (i.e independent of input). Such situation is known as carry generate combinations.

6. In serial addition, the addition is carried out __________
a) 3 bit per second
b) Byte by byte
c) Bit by bit
d) All bits at the same time

Answer: c
Explanation: In serial addition, the addition is carried out bit by bit.

7. How many shift registers are used in a 4 bit serial adder?
a) 4
b) 3
c) 2
d) 5

Answer: c
Explanation: There are two shift registers are used in a 4-bit serial adder, which is used to store the numbers to be added serially. Serial addition takes place bit by bit.

8. A D flip-flop is used in a 4-bit serial adder, why?
a) It is used to invert the input of the full adder
b) It is used to store the output of the full adder
c) It is used to store the carry output of the full adder
d) It is used to store the sum output of the full adder

Answer: c
Explanation: The D flip-flop, i.e. carry flip-flop, is used to store the carry output of the full adder so that it can be added to the next significant position of the numbers in the registers.

9. What is ripple carry adder?
a) The carry output of the lower order stage is connected to the carry input of the next higher order stage
b) The carry input of the lower order stage is connected to the carry output of the next higher order stage
c) The carry output of the higher order stage is connected to the carry input of the next lower order stage
d) The carry input of the higher order stage is connected to the carry output of the lower order stage

Answer: a
Explanation: When the carry output of the lower order stage is connected to the carry input of the next higher order stage, such types of connection is called ripple carry adder in a 4-bit binary parallel adder.

10. If minuend = 0, subtrahend = 1 and borrow input = 1 in a full subtractor then the borrow output will be __________
a) 0
b) 1
c) Floating
d) High Impedance

Answer: b
Explanation: If minuend = 0, subtrahend = 1 and borrow input = 1 in a full subtractor then the borrow output will be 1. Because on subtracting 0 and 1, one borrow is taken and it proceeds till the next step (i.e 0 – 1 – 1 = 0, borrow = 1).

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